In modern digital systems, digital information has to be processed in a reliable and efficient way. In this context, digital information is to be understood as information available in discrete, i.e., discontinuous values. Bits, collection of bits, but also numbers from a finite set can be used to represent digital information.
In most chip-to-chip, or device-to-device communication systems, communication takes place over a plurality of wires to increase the aggregate bandwidth. A single or pair of these wires may be referred to as a channel or link and multiple channels create a communication bus between the electronic components. At the physical circuitry level, in chip-to-chip communication systems, buses are typically made of electrical conductors in the package between chips and motherboards, on printed circuit boards (“PCBs”) boards or in cables and connectors between PCBs. In high frequency applications, microstrip or stripline PCB traces may be used.
Common methods for transmitting signals over bus wires include single-ended and differential signaling methods. In applications requiring high speed communications, those methods can be further optimized in terms of power consumption and pin-efficiency, especially in high-speed communications. More recently, vector signaling methods have been proposed to further optimize the trade-offs between power consumption, pin efficiency and noise robustness of chip-to-chip communication systems. In those vector signaling systems, the digital information is transformed into a different representation space in the form of a vector codeword that is chosen in order to optimize the power consumption, pin-efficiency and speed trade-offs based on the transmission channel properties and communication system design constraints. Herein, this process is referred to as “encoding”. At the receiver side, the received signals corresponding to the codeword are transformed back into the original digital information representation space. Herein, this process is referred to as “decoding”.
FIG. 1 represents a high-level block diagram of such a prior art communication system. At the transmit unit 100 side of the communication system, an encoder 110 transforms a sequence of k information symbols 105 into a vector codeword CW. A driver 120 maps vector codeword CW into a set of physical signals and transmits them on the n wires 135 of bus 130. Although FIG. 1 shows a number of lines for the k information symbols 105 and a number of wires 135, it should be understood that different values for k and n could be used and they need not be equal.
At the other side of bus 130, a receive unit 140 maps the n received physical signals from wires 135 back into k information symbols 145. Receive unit 140 comprises a bus receiver in the form of a signal-to-digital converter (“SDC”) 160 and a vector codeword decoder (“DEC”) 170. In FIG. 1, a task of the SDC 160 is to reconstruct an estimate of the transmitted vector codeword CW from the analog signals transmitted and recorded over the n bus wires 135. SDC 160 then transmits the estimate of vector codeword CW to codeword decoder 170. Codeword decoder 170 can then reconstruct the k output bits by applying the reverse transformation from that of transmit encoder 110. SDC 160 is shown comprising a sampler 180 and a rank-order unit 190.
As an example, bus 130 might be a bus between a processor and memory. In that case, the physical wires may take the form of striplines or microstrips on a PCB. Another example of bus 130 might be a set of wires connecting two different devices.